Upravljačka magistrala

U arhitekturi računara, upravljačka magistrala je (deo) računarske magistrale, koju koristi CPU za komuniciranje sa ostalim uređajima unutar računara. Dok adresna magistrala nosi informaciju o tome sa kojim uređajem CPU komunicira, a magistrala podataka nosi stvarne podatke koji se obrađuju, upravljačka magistrala nosi komande centralne procesorske jedinice i vraća statusne signale od uređaja. Na primer, ukoliko se podaci čitaju ili upisuju na uređaju, odgovarajuća linija (čitanje ili pisanje) će biti aktivna (logička nula).

Linije

Broj i vrsta linija u upravljačkoj magistrali varira, ali postoje osnovne linije zajedničke za sve mikroprocesore kao sto su:

• Čitajuća (${\overline {R}}$). Jedna linija koda je aktivna (logička nula) označava da CPU piše po uređaju.
• Write (${\overline {W}}$). A single line that when active (logic zero) indicates the device is being written by the CPU.
• Byte enable (${\overline {E}}$). A group of lines that indicate the size of the data (8, 16, 32, 64 bytes).

Additional lines are microprocessor-dependent, such as:

• Transfer ACK ("acknowledgement"). Delivers information that the data was acknowledged (read) by the device.
• Bus request. Indicates a device is requesting the use of the (data) bus.
• Bus grant. Indicates the CPU has granted access to the bus.
• Interrupt request. A device with lower priority is requesting access to the CPU.
• Clock signals. The signal on this line is used to synchronize data between the CPU and a device.
• Reset. If this line is active, the CPU will perform a hard reboot.

See also

• Address bus
• Cache bus
• Data bus

Spoljašnje veze

• Definition by Webopedia.
• Computer system organization at the University of California, Riverside.
• "Hardware and Software Architecture", a PowerPoint presentation at California State University, Los Angeles.